The UNIVAC Athena computer calculated ground commands to transmit to the HGM-25A Titan I intercontinental ballistic missile (ICBM) as part of Western Electric's missile guidance system. The Athena was the "first transistorized digital computer to be produced in numbers." Athena, consisting of ten cabinets plus console on a 13.5 by 20 foot (4.1 by 6 m) floor plan. It used radar tracking of the missile to compute Titan flight data to the necessary burn-out point to start a ballistic trajectory toward the target. On-board Titan attitude control rolled the missile to maintain the missile antenna aligned to the ground antenna. Computer commands were transmitted to the missile from a ground transmitter a "quarter mile out" (400 m).[1] Completed in 1957, the Athena weighed 21,000 pounds (11 short tons; 9.5 t).[2][3]
https://en.wikipedia.org/wiki/ATHENA_computer
The Athena used a Harvard architecture design with separate data and instruction memories by Seymour Cray at Sperry Rand Corporation and cost about $1,800,000.[4] Used with the computer were the:
- AN/GSK-1 Computer Set Console (OA-2654)[5]
- Friden, Inc. terminal with paper tape equipment[2]
- "massive motor-generator set with 440 volt 3 phase AC input [that] weighed over 2 tons" at remote locations[6]
- input from one of two large AN/GRW-5 Western Electric radars in silos each with "20 foot (6 m) tall antenna" raised prior to launch and locked to the raised Titan's "missileborne antenna".[7][1]
The "battleshort" mode ("melt-before-fail") prevented fail-safe circuits such as fuses from deactivating the machine e.g., during a missile launch.[8] The last Athena-controlled launch was a Thor-Agena missile launched in 1972 from Vandenberg Air Force Base in California, the last of over 400 missile flights using the Athena.[9][10] The 26 Athena computers, when declared surplus by the federal government, went to various United States universities. The one at Carnegie was used as an undergraduate project until 1971, when the former electrical engineering undergraduate students (Athena Systems Development Group) orchestrated its donation to the Smithsonian Institution.
https://en.wikipedia.org/wiki/ATHENA_computer
The Univac Series 70 is an obsolete family of mainframe class computer systems from UNIVAC first introduced in 1973.
In September 1971, the RCA Corporation announced that it was abandoning the computer industry and Sperry acquired RCA’s Computer division. RCA had marketed the Spectra 70 Series (70/15, 70/25, 70/35, 70/45, 70/46, 70/55, 70/60, 70/61) that were compatible with the IBM System/360 series at the application level, and the RCA Series (RCA 2, 3, 6, 7) competing against the IBM System/370.
In January 1972, Sperry took over the RCA customer base, offering the Spectra 70 and RCA Series computers as the UNIVAC Series 70.[1]
A number of the RCA customers continued with Sperry, and the UNIVAC Series 90 90/60 and 90/70 systems would provide an upgrade path for the customers with 70/45, 70/46, RCA 2 and 3 systems. In 1976, Sperry added the 90/80 at the top end of the Series 90 Family, based on an RCA design, providing an upgrade path for the 70/60, 70/61, RCA 6 and 7 systems.
The RCA base was very profitable for Sperry and Sperry was able to put together a string of 40 quarters of profit.
https://en.wikipedia.org/wiki/UNIVAC_Series_70
The UNIVAC LARC, short for the Livermore Advanced Research Computer, is a mainframe computer designed to a requirement published by Edward Teller in order to run hydrodynamic simulations for nuclear weapon design. It was one of the earliest supercomputers.[1]
LARC supported multiprocessing with two CPUs (called Computers) and an input/output (I/O) Processor (called the Processor). Two LARC machines were built, the first delivered to Livermore in June 1960, and the second to the Navy's David Taylor Model Basin. Both examples had only one Computer, so no multiprocessor LARCs were ever built.[2]
The LARC CPUs were able to perform addition in about 4 microseconds, corresponding to about 250 kIPS speed. This made it the fastest computer in the world until 1962 when the IBM 7030 took the title. The 7030 started as IBM's entry to the LARC contest, but Teller chose the simpler Univac over the more risky IBM design.
https://en.wikipedia.org/wiki/UNIVAC_LARC
| Developer | Sperry Univac |
|---|---|
| Working state | Discontinued |
| Initial release | January 1974 |
| Platforms | UNIVAC Series 90/60 and 90/70 |
OS/7 is a discontinued operating system from Sperry Univac for its 90/60 and 90/70 computer systems. The system was first announced in November 1971 for Univac's 9700 system and was originally scheduled for delivery in March 1973.[1][2] However, the delivery slipped by nearly a year, which impacted the 9700 marketing effort. It was first demonstrated by Univac on the new 90/60 system in October 1973. The official release was then planned for January 1974.[2] OS/7 was abruptly discontinued in 1975 in favor of VS/9, Univac's name for RCA's VMOS operating system.[3][4]
"OS/7 is a multi-tasking, multi-programming system that utilizes a roll-in, roll-out capability to keep the CPU optimally busy."[5]
https://en.wikipedia.org/wiki/OS/7
The UNIVAC 1100/60, introduced in 1979,[1] continued the venerable UNIVAC 1100 series first introduced in 1962 with the UNIVAC 1107. The 1107 was the first 1100 series machine introduced under the Sperry Corporation name.
Like its predecessors, it had support for multiple CPUs; initially only two, but later up to four. It continued the naming convention introduced with the 1100/10, where the last digit represented the number of CPUs (thus, a four CPU system would be an 1100/64).
The 1100/60 introduced a new feature to the line: the CPUs used microcode that was loaded during the booting process. The booting process was controlled by a microcomputer (called the "SSP" - "System Support Processor") that ran from 8-inch floppy disks. The microcode was stored on these disks.
The system included an optional (extra-cost) set of additions to the instruction set (referred to as the Extended Instruction Set or EIS), which contained features to enhance the execution of COBOL programs, when appropriately compiled.
The UNIVAC 1100/70 shared much of the same architecture, including the same console and microcode.
https://en.wikipedia.org/wiki/UNIVAC_1100/60
Category:UNIVAC mainframe computers
Pages in category "UNIVAC mainframe computers"
The following 19 pages are in this category, out of 19 total. This list may not reflect recent changes.
The UNIVAC Solid State was a magnetic drum-based solid-state computer announced by Sperry Rand in December 1958 as a response to the IBM 650. It was one of the first[citation needed] computers to be (nearly) entirely solid-state, using 700 transistors, and 3000 magnetic amplifiers (FERRACTOR) for primary logic, and 20 vacuum tubes largely for power control. It came in two versions, the Solid State 80 (IBM-style 80-column cards) and the Solid State 90 (Remington-Rand 90-column cards). In addition to the "80/90" designation, there were two variants of the Solid State – the SS I 80/90 and the SS II 80/90. The SS II series included two enhancements – the addition of 1,280 words of core memory and support for magnetic tape drives. The SS I had only the standard 5,000-word drum memory described in this article and no tape drives.
https://en.wikipedia.org/wiki/UNIVAC_Solid_State
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